Technical Sessions on September 23 (Draft ver.)

Session A-3 Organic Light Emitting Diodes (Room 211, 9:00-10:30, September 23)

Paper # Start Time Title Authors Affiliations Country
A-3-1 9:00 Improved the power efficiency of white phosphorescent organic light-emitting diode with thin double emitting-layers and hole-trapping mechanism F. S. Juang, S. H. Wang, Y. S. Tsai, M. H. Gao, Y. Chi, H. P. Shieh National Formosa Univ., National Tsing Hua Univ., National Chiao Tung Univ. Taiwan
A-3-2 9:15 Current Density Dependence of Transient Properties in Green Phosphorescent Organic Light-Emitting Diodes H. Kajii, N. Takahota, Y. Wang, Y. Ohmori Osaka Univ. Japan
A-3-3 9:30 High efficiency phosphorescent organic light-emitting diode by incorporating an electron transport material into emitting layer F. S. Juang, S. H. Wang, Y. H. Tsai, B. S. Hsieh, Y. Chi,H. P. Shieh National Formosa Univ., National Tsing Hua Univ., National Chiao Tung Univ. Taiwan
A-3-4 9:45 Enhancing Efficiency of Organic Light-Emitting Diodes Using a CsI-Doped Electron Transporting Layer T. W. Kuo, S. H. Su, C. M. Su, M. Yokoyama I-Shou Univ. Taiwan
A-3-5 10:00 Maskless Patterning of Vapor-Deposited Photosensitive Film and its Application to Organic Light-Emitting Diodes M. Muroyama, W. Saito, S. Yokokura, K. Tanaka, H. Usui Tokyo Univ. Japan
A-3-6 10:15 Direct Probing of Carrier Behavior in Electroluminescence IZO/α-NPD/Alq3/LiF/Al Diode by Time-Resolved Optical Second-Harmonic Generation D. Taguchi, L. Zhang, J. Li, T. Manaka, M. Iwamoto Tokyo Tech. Japan

Session A-4 Organic Memory and Related Materials (Room 211, 15:10-16:25, September 23)
Paper # Start Time Title Authors Affiliations Country
A-4-1 (Invited) 15:10 Non-Volatile Mplecular Memory nano-interfaced with organic molecules H. Lee Sungkynkwan Univ. Korea
A-4-2 15:40 The dry etching process for patterning P(VDF-TeFE) thin film with various conditions D. Terashima, J. Jeong, C. Kimura, H. Aoki Osaka Univ. Japan
A-4-3 15:55 The influence of the intensity of an electric field on properties of P(VDF-TeFE)thin films during the annealing process J. H. Jeong, D. Terashima, C. Kimura, H. Aoki Osaka Univ. Japan
A-4-4 16:10 Carrier Transport in Electrical Bistable Device based on Hyperbranched Polymer and Gold Nanoparticle Composite Thin Films H. ICHIKAWA, Y. KEI,M. OZAWA, K. ODOI,K. FUJITA Kyushu Univ., Nissan Chemical Indus. Ltd. Japan

Session A-5 Organic Electronics and Device Physics (Room 211, 16:50-17:35, September 23)
Paper # Start Time Title Authors Affiliations Country
A-5-1 16:50 Surface Manipulation of Precursor Carbazole Dendron Polymer Thin Films by Conducting-AFM Nanolithography A. Baba, R. Oyanagi, T. Mashima, Y. Ohdaira, K. Shinbo, K. Kato, F. Kaneko, G. Jiang, R. Advincula Niigata Univ., University of Houston Japan
A-5-2 17:05 Computational Study of Electronic States around Defects in Organic Semiconductors T. Shimada, M. Ohtomo, T. Yanase, T. Hasegawa Hokkaido Univ., Tokyo Univ. Japan
A-5-3 17:20 Preparation of a Hybrid Sensor of Surface Plasmon Resonance and Quartz Crystal Micorobalance by Using Imprinted Grating Structure K. Shinbo, K. Kuroki, Y. Tesuma, Y. Ohdaira, A. Baba, K. Kato, F. Kaneko Niigata Univ. Japan

Session B-3 High-k Gate Stack (Room 212, 9:00-10:30, September 23)
Paper # Start Time Title Authors Affiliations Country
B-3-1 (Invited) 9:00 Atomic mechanism of Flat band voltage shifts by Oxide dipole Layers in High K-Metal Gate Stacks J. Robertson Cambridge Univ. UK
B-3-2 9:30 Oxygen vacancy mobility and diffusion coefficient determined from current measurements in SiO2/HfO2/TiN stacks S. Zafar, H. Jagannathan, L. F. Edge, D. Gupta IBM USA
B-3-3 9:50 Fermi-Level Pinning and NBTI Free of CMOS HfO2 By Pre-CF4 Plasma Passivation H. H. Chiu, C. S. Lai, J. C. Wang Chang Gung Univ. Taiwan
B-3-4 10:10 Enhanced Electrical Uniformity and Breakdown of Multi-Step Deposited and Annealed HfSiO-Insight by Scanning Tunneling Microscopy K. S. Yew, D. S. Ang, K. L. Pey, G. Bersuker, P. S. Lysaght, D. Heh Nanyang Tech. Univ., SEMATECH Singapore

Session B-4 Process Integration (Room 212, 15:10-16:20, September 23)
Paper # Start Time Title Authors Affiliations Country
B-4-1 (Invited) 15:10 High-k/Metal Gate Technology for 22nm Generation and Beyond M. Takayanagi Toshiba America Electronic Components, Inc. USA
B-4-2 15:40 Analytical Approach for Enhancement of nMOSFET Performance with Si:C Source/Drain Formed by Molecular Carbon Ion Implantation and Laser Annealing T. Yamaguchi, Y. Kawasaki, T. Yamashita, N. Miura, M. Mizuo, J. Tsuchimoto, K. Eikyu, K. Maekawa, M. Fujisawa, K. Asai Renesas Electonics Corp. Japan
B-4-3 16:00 Mechanism to Achieve PMOS and NMOS Band Edge Work Function using Low Temperature Tuning Process for Low Power Application C. S. Park, G. Bersuker, T. Ngai, J. Huang, K. H. Lin, J. Barnett, J. Price, K. Rader, P. Lysaght, B. Taylor, P. D. Kirsch, R. Jammy SEMATECH,UMC USA

Session B-5 Advanced Gate Dielectries (Room 212, 16:50-18:10, September 23)
Paper # Start Time Title Authors Affiliations Country
B-5-1 16:50 Asymmetric Gate-oxide Thickness Four-terminal FinFETs Fabricated using Low-Temperature and Atomically Flat interface Neutral-Beam Oxidation Process A. Wada, K. Endo, M. Masahara, S. Samukawa Tohoku Univ., AIST Japan
B-5-2 17:10 Mobility Degradation and Interface Dipole Formation in Direct-Contact HfO2/Si MOSFETs N. Miyata, H. Ishii, T. Itatani, T. Yasuda AIST Japan
B-5-3 17:30 Robust Ultra-violet (UV) Analysis Technique for Band Diagram Extraction of Al/HfGdO/SiO2/p-Si Structure with Different Hf/Gd Dual-sputtered Ratio P. C. Chou, J. C. Wang, C. S. Lai, J. Y. Lin, W. C. Chang, K. T. Chen, Y. C. Chung,Y. H. Lin, I. T. Wang,C. I. Wu, P. S. Wang Chang Gung Univ., National Taiwan Univ. Taiwan
B-5-4 17:50 Stability origin of metastable higher-k phase HfO2 at room temperature Y. Nakajima, K. Kita, T. Nishimura, K. Nagashio, A. Toriumi Univ. of Tokyo Japan

Session C-3 Tunnel & Schottky-S/D FETs (Room 213, 9:00-10:30, September 23)
Paper # Start Time Title Authors Affiliations Country
C-3-1 (Invited) 9:00 Tunnel FET Promise and Challenges T. J. K. Liu Univ. of California Berkeley USA
C-3-2 9:30 Optimization of Silicon ρ-channel Tunnel FET with Dual κ Spacer H. Virani, S. Gundapaneni, A. Kottantharayil Indian Inst. of Tech. India
C-3-3 9:50 Drive Current Improvement in Si Tunnel Field Effect Transistors by means of Silicide Engineering D. Leonelli, A. Vandooren, R. Rooyackers, A. Verhulst, S. De Gendt, M. Heyns, G. Groeseneken IMEC, Katholieke Univ. Leuven Belgium
C-3-4 10:10 Metal Schottky S/D Technology of Ultra Thin SOTB (Silicon on Thin Box) MOSFET A. Shima, N. Sugii,N. Mise, D. Hisamoto,K. Takeda, K. Torii Hitachi, Ltd. Japan

Session C-4 Tr & SRAM Variabilities (Room 213, 15:10-16:10, September 23)
Paper # Start Time Title Authors Affiliations Country
C-4-1 15:10 Effective Suppression of Random-Dopant-Induced Characteristic Fluctuation Using Dual Material Gate Technique for 16 nm MOSFET Devices K. F. Lee, Y. Li,C. Y. Yiu, T. T. Khaing National Chiao Tung Univ. Taiwan
C-4-2 15:30 High Temperature Characteristic of Radom Variability of Drain Current in Scaled FETs T. Tsunomura, A. Kumar, T. Mizutani, A. Nishida, K. Takeuchi, S. Inaba, S. Kamohara, K. Terada, T. Hiramoto, T. Mogami MIRAI-Selete, Univ. of Tokyo, Hiroshima City Univ. Japan
C-4-3 15:50 Device Engineering to Improve SRAM Static Noise Margin J. Luo, L. Wei,F. Boeuf, D. Antoniadis, T. Skotnicki, H. S. P. Wong Stanford Univ., STMicroelectronics, MIT USA

Session C-5 Si Nanowire Technology (Room 213, 16:50-18:10, September 23)
Paper # Start Time Title Authors Affiliations Country
C-5-1 16:50 Fully Quantum Study of Silicon Devices with Scattering Based on Wigner Monte Carlo Approach S. Koba, R. Aoyagi, H. Tsuchiya, Kobe Univ. Japan
C-5-2 17:10 Ultra-Thin (4nm) Gate-All-Around CMOS devices with High-k/Metal for Low Power Multimedia Applications J. L. Huguenin, S. Monfray, G. Bidal, S. Denorme, P. Perreau, N. Loubet, Y. Campidelli, M. P. Samson, C. Arvet, K. Benotmane, F. Leverd, P. Gouraud, B. Le-Gratiet, C. De-Butet, L. Pinzelli, R. Beneyton, S. Barnola, T. Morel, A. Halimaoui, F. Boeuf, G. Ghibaudo, T. Skotnicki STMicroelectronics, IMEP, CEA-LETI France
C-5-3 17:30 Heavily-Doped Poly-Si Gate and Epi-First Source/Drain Extension Technique in Strained Si Nanowire MOSFETs with Reduced Papasitic Resistance Y. Nakabayashi, M. Saitoh, T. Ishihara, T. Numata, K. Uchida, J. Koga Toshiba Corp., Tokyo Inst. of Tech. Japan
C-5-4 17:50 Low GIDL and Its Physical Origins in Si Nanowire Transistors K. Zaitsu, M. Saitoh, Y. Nakabayashi, T. Ishihara, T. Numata, Toshiba Corp. Japan

Session D-3 GaN LED (Room 221, 9:00-10:45, September 23)
Paper # Start Time Title Authors Affiliations Country
D-3-1 9:00 InGaN-based Blue Light-Emitting Diodes with Electron Blocking Layer Fabricated on Patterned Sapphire Substrates K. T. Liu, C. K. Hsu, S. J. Chang, Univ. of Cheng Shiu, National Cheng Kung Univ. Taiwan
D-3-2 9:15 Enhanced Light Output of Vertical GaN-Based Light-Emitting Diodes with a Distributed Bragg Reflector and a Roughened GaOx Surface Film W. C. Lee, K. M. Uang, T. M. Chen, D. M. Kuo, P. R. Wang, P. H. Wang, S. J. Wang, National Cheng Kung Univ., WuFeng Inst. of Tech. Taiwan
D-3-3 9:30 Epitaxial-Lateral-Overgrowth of Gallium Nitride for Embedding the Micro-Mirror Array H. M. Ku, C. Y. Huang, C. Z. Liao, S. Chao National Tsing Hua Univ., Indus. Tech. Res. Inst. Taiwan
D-3-4 9:45 High performance GaN-based light emitting diodes grown on 4-inch Si (111) Y. Zhu, A. Watanabe,L. Lu, Z. Chen,T. Egawa, Nagoya Inst. Of Tech. Japan
D-3-5 10:00 GaN based Light Emitting Diode with Enhanced Optical Output and Improved Luminescence by employing Excimer Laser Irradiation in contact formation G. H. Wang, T. Sudhiranjan, T. C. Wong, X. Wang, H. Y. Zheng, T. K. Chan, T. Osipowicz, Y. L. Foo Inst. Of Materials Res. And Eng.,Singapore Inst. Of Manufacturing Tech., National Univ. of Singapore Singapore
D-3-6 10:15 Light Emission Enhancement of GaN-Based Photonic Crystal With Ultraviolet AlN/AlGaN Distributed Bragg Reflector C. C. Chen, J. R. Chen, Y. C. Yang, M. H. Shih, H. C. Kuo, National Chiao Tung Univ., RCAS Taiwan
D-3-7 10:30 Light Output Enhancement of Ultraviolet Light Emitting Diodes with Pattern HfO2/SiO2 Distributed Bragg Reflector B. S. Cheng, C. H. Chiu, M. H. Lo, H. C. Kuo, T. C. Lu,Y. J. Cheng, S. C. Wang, National Chiao Tung Univ., Academia Sinica Taiwan

Session D-4 Photonic Crystal Devices (Room 221, 15:10-16:25, September 23)
D-4-1 (Invited) 15:10 Information processing and sensing with photonic crystal microcavities in SOI P. M. Fauchet Univ. of Rochester USA
D-4-2 15:40 Pulse selection by on-the-fly wavelength conversion in 2D photonic crystals T. Asano, J. Upham, Y. Tanaka, S. Noda Kyoto Univ. Japan
D-4-3 15:55 Demonstration of a Silicon photonic Crystal Slab LED with Efficient Electroluminescence S. Nakayama, S. Iwamoto, S. Ishida, Y. Arakawa Univ. of Tokyo Japan
D-4-4 16:10 Optimized Micro-Cavity and Photonic Crystal in GaN-based Thin-Film Light-Emitting Diodes for Highly Directional Beam Profiles C. F. Lai, C. H. Chao, W. Y. Yeh, Industrial Technology Research Institute Taiwan

Session D-5 Quantum Dot (Room 221, 16:50-17:35, September 23)
Paper # Start Time Title Authors Affiliations Country
D-5-1 16:50 Light emission from a strongly coupled single quantum dot-photonic crystal nanobeam cavity system R. Ohta, Y. Ota, M. Nomura, N. Kumagai, S. Ishida, S. Iwamoto, Y. Arakawa, Univ. of Tokyo Japan
D-5-2 17:05 Excited State Bilayer Quantum Dot Lasers at 1.3μm M. A. Majid, D. T. D. Childs, H. Shahid, K. Kennedy, R. Airey, R. A. Hogg, E. Clarke, P. Spencer, R. Murray, Univ. of Sheffield, Imperial College UK
D-5-3 17:20 A tunnel injection structure for speeding up carrier dynamics in InAs/GaAs quan-tum dots using a GaNAs quantum-well injector C. Y. Jin, S. Ohta, M. Hopkinson, O. Kojima, T. Kita, O. Wada Kobe Univ., Univ. of Sheffield Japan

Session E-3 Flash Memory II (Room 241, 9:00-10:45, September 23)
Paper # Start Time Title Authors Affiliations Country
E-3-1 (Invited) 9:00 Current Development Status and Future Challenges of Charge-Trapping NAND Flash H. T. Lue Macronix International Co., Ltd. Taiwan
E-3-2 9:30 Collective Tunneling Model in Charge Trap Type NVM Cell M. Muraguchi, Y. Sakurai,T. Yukihiro, S. Yasuteru,I.. Mitsuhisa, M. Katsunori,M. Seiichi, N. Shintaro,S. Kenji, E. Tetsuo Tohoku Univ., Univ. of Tsukuba, Hiroshima Univ., Univ. of Hyogo Japan
E-3-3 9:50 Bandgap Engineered Nanowire (BEN) SONOS NAND Flash Memory J. G. Yun, D. W. Kwon, J. H. Lee, H. Shin, B. G. Park, Seoul National Univ., Samsung Electronics Corp., Ltd. Korea
E-3-4 10:10 Atomistic Design of Guiding Principles for High Quality MONOS Memories-First Principles Study of H and O Incorporation Effects for N Vacancies in SiN Charge Trap Layers- K. Yamaguchi, A. Otake, K. Shiraishi, Univ. of Tsukuba Japan
E-3-5 10:30 Dynamics of the Charge Centroid in MONOS Memory Cells during Avalanche Injection and FN Injection Based on Incremental-Step-Pulse-Programming J. Fujiki, T. Haimoto, N. Yasuda, M. Koyama TOSHIBA Corp. Japan

Session E-4 Flash Memory III (Room 241, 15:10-16:10, September 23)
Paper # Start Time Title Authors Affiliations Country
E-4-1 15:10 Y-disturb Study of Charge-trapping Type Non-volatile Memory Cell for 45nm Generation Node T. F. Ou, C. H. Cheng, W. C. Tzeng, G. D. Lee, S. H. Ku,C. H. Liu, K. W. Liu, N. K. Zous, W. J. Tsai, S. W. Huang, M. S. Chen,W. P. Lu, K. C. Chen,C. Y. Lu Ltd. of Macronix Taiwan
E-4-2 15:30 In-Depth Study on Mechanism of the Performance Improvement by High Temperature Annealing of the Al2O3 in a Charge-Trap Type Flash Memory Device J. K. Park, KAIST Korea
E-4-3 15:50 POST-BREAKDOWN RECOVERABLE METAL NANOCRYSTAL-BASED AL2O3/SIO2GATE STACK FOR NON-VOLATILE MEMORY C.Yi Ning, P. Kin Leong, G. Kuan Eng Johnson, L. Zin Zar, S. Pawan, M. Souvik, W. Qing Xaio, Z. Jie Nanyang Tech. Univ., Inst.of Material Res.and Eng., Indian Inst.of Tech.,GlobalFoundries Singapore Pte. Ltd Singapore

Session E-5 Flash Memory IV (Room 241, 16:50-17:30, September 23)
E-5-1 16:50 Investigation of Threshold Voltage Disturbance Caused by Programmed Adjacent Cell in Virtual Source/Drain NAND Flash Memory Device W. Kim, D. W. Kwon, J. H. Ji, J. H. Lee, B. G. Park, Seoul National Univ. Korea
E-5-2 17:10 Band Energy Engineered Metal Nanodots Nonvolatile Memory to Achieve Long Retention Characteristics T. Hiraki, Y. Pei, T. Kojima, J. C. Bea, H. Kino, M. Koyanagi, T. Tanaka, Tohoku Univ. Japan

Session F-3 Spin Manipulation and Photon Detection (Room 242, 9:00-10:45, September 23)
Paper # Start Time Title Authors Affiliations Country
F-3-1 (Invited) 9:00 Quantum media conversion from a photon to an electron spin H. Kosaka Tohoku Univ. Japan
F-3-2 9:30 Spin-relaxation Dynamics of Excited Trion States in an InAs Quantum Dot Y. Igarashi, M. Shirane, Y. Ota, M. Nomura, N. Kumagai, S. Ohkouchi, A. Kirihara, S. Ishida, S. Iwamoto, S . Yorozu, Y. Arakawa NEC Corp., INQIE, Univ. of Tokyo Japan
F-3-3 9:45 Single-Photon Detection by Individual Dopants and the Effect of Channel Shape in SOI-FET A. Udhiarto, D. Moraru, R. Nakamura, S. Miki, T. Mizuno,V. Mizeikis, M. Tabe Univ. of Shizuoka, Univ. of Shizuoka Japan
F-3-4 10:00 Spin Resonant Tunneling through Quantum Dots with Engineered g-factors S. M. Huang, Y. Tokura, H. Akimoto, K. Kono, J. J. Lin, S. Tarucha, K. Ono Low temperature physics lab., RIKEN, Inst. of Physics, National Chiao Tung Univ., NTT basic research lab., NTT, Quantum spin information project, ICORP-JST, Univ. of Tokyo Japan
F-3-5 10:15 Coherent Manipulation and Bi-Directional Polarization of Nuclear Spins in a Quantum Dot Device R. Takahashi, K. Kono, S. Tarucha, K. Ono Tokyo Tech, RIKEN, Univ. of Tokyo, ICORP-JST, CREST-JST Japan
F-3-6 10:30 Transmission Characteristics of a Quantum Point Contact for Edge Magnetoplasmons K. Washio, M. Hashisaka, H. Kamata, K. Muraki, T. Fujisawa Tokyo Tech, NTT Basic Res. Labs. Japan

Session F-4 Quantum Dots (Room 242, 15:10-16:25, September 23)
Paper # Start Time Title Authors Affiliations Country
F-4-1 (Invited) 15:10 "Silicon Quantum Dots and Donors for Quantum Information Processing" A. S. Dzurak Univ. of New South Wales Australia
F-4-2 15:40 Simulation study of charge modulation in coupled quantum dots in silicon T. Kambara, T. Kodera, G. Yamahata, K. Uchida, S. Oda Tokyo Tech, Univ. of Tokyo Japan
F-4-3 15:55 Preparation of SOI-based Double Quantum Dots Structure Defined by Geometry and Electrostatically M. A. Sulthoni, T. Kodera, K. Uchida, S. Oda QNERC Tokyo Institute of Technology, Tokyo Tech Japan
F-4-4 16:10 Single Electron Transistors (SETs) for Reducing Source/Drain Resistance and MOS Current J. E. LEE, W. B. Shim, J. G. Yun, K. C. Kang, J. H. Lee, H. Shin, B. G. Park Seoul National Univ. Korea

Session F-5 New Functional MOS Structures (Room 242, 16:50-18:05, September 23)
Paper # Start Time Title Authors Affiliations Country
F-5-1 16:50 Three Dimensional Floating Gate Memory with Multi-layered Nanodot Array Formed by Bio-LBL K. Ohara, B. Zheng, M. Uenuma, I. Yamashita,Y. Uraoka NAIST, CREST-JST Japan
F-5-2 17:05 Switching voltage reduction of resistance switching memory using Si/CaF2/CdF2 quantum-well structures M. Watanabe, Y. Nakashouji, K. Tsuchiya Tokyo Tech Japan
F-5-3 17:20 Time dependent analysis of the applied voltage operation for ensuring 10-year lifetime with SiN MOSFET noise source device M. Matsumoto, T. Tanamoto, S. Yasuda, R. Ohba, S. Fujita Toshiba Corp. Japan
F-5-4 17:35 Strong Stark effect of electroluminescence in thin SOI MOSFETs J. Noborisaka, K. Nishiguchi, Y. Ono, H. Kageshima,A. Fujiwara NTT Corp. Japan
F-5-5 17:50 Drive Current Enhancement with Invasive Source in Double Gate Tunneling Field-Effect Transistors Y. Yang, P. F. Guo, G. Q. Han, C. L. Zhan, L. Fan, Y. C. Yeo National Univ. of Singapore Singapore

Session G-3 Modeling, Variation and Reliability (Room 243, 9:00-10:50, September 23)
Paper # Start Time Title Authors Affiliations Country
G-3-1 (Invited) 9:00 A Practical Modeling Solution for the Nanodevices with Strain Engineering C. S. Yeh UMC Taiwan
G-3-2 9:30 Analysis of Within-Die and Die-to-Die CMOS-Process Variation With Reconfigurable Ring-Oscillator Arrays T. Ansari, W. Imafuku, A. Kawabata, M. Yasuda, T. Koide, H. J. Mattausch Hiroshima Univ. Japan
G-3-3 9:50 Large Scale Test Circuits for Systematic Evaluation of Variability and Noise of MOSFETs’ Electrical Characteristics Y. Kumagai, K. Abe, T. Fujisawa, S. Watabe, R. Kuroda, N. Miyamoto, T. Suwa, A. Teramoto, S. Sugawa, T. Ohmi Tohoku Univ. Japan
G-3-4 10:10 A 65nm CMOS 400ns Measurement Delay NBTI-Recovery Sensor by Minimum Assist Circuit T. Matsumoto, H. Makino, K. Kobayashi, H. Onodera Kyoto Univ., Kyoto Inst. Of Tech., CREST-JST Japan
G-3-5 10:30 Prediction of Circuit Degradation with Transient BTI and HC Simulations D. Hagishima, T. Ishihara, K. Matsuzawa, K. Masuda Toshiba Corp. Japan

Session G-4 Advanced Analog Circuits (Room 243, 15:10-16:10, September 23)
Paper # Start Time Title Authors Affiliations Country
G-4-1 15:10 A Gate-drain Coupling Distributed Amplifier in 90-nm CMOS Technology C. Y. Hsiao, W. B. W. Wang, T. Y. Su, Y. C. Wu, S. S. H. Hsu, National Tsing Hua Univ. Taiwan
G-4-2 15:30 A 60dB SFDR Low-Noise Amplifier with Variable Bandwidth for Neural Recoding Systems K. Sueishi, T. Yoshida, Iwata, K. Matsushita, Hirata, . Suzuki Hiroshima Univ., A-R-Tech Corp., Osaka Univ., Univ. of Tokyo Japan
G-4-3 15:50 Temperature Compensated Nano-Ampere CMOS Current Reference Circuit Using Small Offset Voltage Y. Osaki, T. Hirose, N. Kuroki, M. Numa Kobe Univ. Japan

Session G-5 Integrated MEMS/Bio Sensors (Room 243, 16:50-18:05, September 23)
Paper # Start Time Title Authors Affiliations Country
G-5-1 (Invited) 16:50 The Integrated CMOS-MEMS Technology and its Application. K. Machida NTT AT Japan
G-5-2 17:20 Polarization Analyzing Image Sensor with Monolithically Embedded Polarizer using 65nm CMOS Process S. Shishido, T. Noda, K. Sasagawa, T. Tokuda, J. Ohta NAIST Japan
G-5-3 17:35 Design and Fabrication of Smart All-in-one Chip for Electrochemical Measurement T. Yamazaki, T. Ikeda, M. Ishida, K. Sawada Toyohashi Univ. of Tech., HIOKI E.E. E. Corp., JST, CREST Japan
G-5-4 17:50 Amperometric Electrochemical Sensor Array for On-Chip Simultaneous Imaging: Circuit and Microelectrode Design Considerations J. Hasegawa, S. Uno, K. Nakazato Nagoya Univ. Japan

Session H-3 Oxides and Nanowires (Room 244, 9:00-10:30, September 23)
Paper # Start Time Title Authors Affiliations Country
H-3-1 9:00 Crack-Free Epitaxial ZnO film on Si(111) with Gd2O3(Ga2O3) buffer layer B. H. Lin, W. R. Liu, C. C. Kuo, C. H. Hsu, W. F Hsieh,M. Hong, J. Kwo, National Chiao Tung Univ., National Synchrotron Radiation Research Center, National Cheng Kung Univ., National Tsing Hua Univ. Taiwan
H-3-2 9:15 Optical properties of ZnO/Au core/shell nano-tips Y. H. Ko, J. S. Yu Kyung Hee Univ. Korea
H-3-3 9:30 Conductance of Zinc Oxide Nanocontacts Studied by In Situ Transmission Electron Microscopy T. Kase, T. Kizuka Univ. of Tsukuba Japan
H-3-4 9:45 The Role of Aluminum Catalyst Atoms in Shaping the Structural and Electrical Properties of Epitaxial Silicon Nanowires O. Moutanabbir, S. Senz, M. Alexe, Y. Kim, R. Scholz,H. Blumtritt, C. Wiethoff,T. Nabbefeld, F. J. Meyer zu Heringdorf, M. Horn-von Hoegen, D. Isheim, D. N. Seidman Max Planck Institute of Microstructure Physics, Univ. Duisburg-Essen,Northwestern Univ. Germany
H-3‐5 10:00 Growth and Characterization of GaAsP Nanowires on GaAs(111)B Substrate by Selective-Area Metal Organic Vapor Phase Epitaxy S. Fujisawa, T. Sato, S. Hara, J. Motohisa, K. Hiruma, T. Fukui Hokkaido Univ. Japan
H-3-6 10:15 Fabrication of Rectifying Pt/TiOx/Pt by RF-Magnetron Sputtering N. Zhong, H. Shima, H. Akinaga, AIST,CREST-JST Japan

Session H-4 Carbon Interconnect (Room 244, 15:10-16:20, September 23)
Paper # Start Time Title Authors Affiliations Country
H-4-1 (Invited) 15:10 Thermal Transport in Graphene and Few-Layer Graphene: Applications in Thermal Management A. A. Balandin Univ. of California USA
H-4-2 15:40 Plasma Discharge Condition Dependence of the Crystallographic Quality of Networked Nanographite Grown by the Photoemission-Assisted Plasma-Enhanced CVD S. Ogawa, T. Kaga, Y. Ohtomo, M. Sato, M. Nihei, Y. Takakuwa Tohoku Univ., CREST-JST, Fujitsu Ltd. Japan
H-4-3 16:00 Carbon Nanotube Growth for Vias and Interconnects J. Robertson, C. S. Esconjauregui, B. C. Bayer, F. Yan, G. Zhong, J. Dijon, H. Okuna Cambridge Univ., CEA UK

Session H-5 Cu/Low-k Integration (Room 244, 16:50-18:00, September 23)
Paper # Start Time Title Authors Affiliations Country
H-5-1 (Invited) 16:50 Advanced organic polymers for the aggressive scaling of low-k materials M. Pantouvaki IMEC Belgium
H-5-2 17:20 DMOTMDS/MTMOS Multi-Stacked SiOCH films for Super-Low-k and Sufficient Modulus Formed by Damage-free Neutral Beam Enhanced CVD T. Sasaki, S. Yasuhara, T. Shimayama, K. Tajima, H. Yano, S. Kadomura, M. Yoshimaru, N. Matsunaga, S. Samukawa Tohoku Univ., STARC Japan
H-5-3 17:40 Improvement of Variability and Reliability in Low-k/Cu Interconnects by Selectivity Control in Dry-Etching Process I. Kume, M. Ueki, N. Inoue, J. Kawahara, N. Ikarashi, N. Furutake, S. Saitoh, Y. Hayashi Renesas Electronics Corp. Japan

Session I-3 III-V Devices Technologies (Room 245, 9:00-10:30, September 23)
Paper # Start Time Title Authors Affiliations Country
I-3-1 (Invited) 9:00 Terahertz Oscillating InGaAs/AlAs Resonant Tunneling Diode S. Suzuki Tokyo Tech Japan
I-3-2 9:30 InSb MOS Diodes on a Si (111) Substrate Grown by Surface Reconstruction Controlled Epitaxy A. Kadoda, T. Iwasugi, K. Nakatani, K. Nakayama, M. Mori, IK. Maezawa Univ. of Toyama Japan
I-3-3 9:45 Effect of Fluorine Incorporation on Wsix/Al2O3/GaAs Gate Stack B. S. Ong, K. L. Pey,C. Y. Ong, C. S. Tan, C. L. Gan, H. Cai, D. A. Antoniadis, E. Fitzgerald Nanyang Technological University,Massachusetts Institute of Technology Singapore
I-3-4 10:00 Dependence of Optical Response Time on Gate-to-Source Voltage for InAlAs/InAs/InGaAs Pseudomorphic High Electron Mobility Transistors T. Ando, H. taguchi, K. Uchimura, M. Mochiduki, T. Iida, Y. Takanashi Tokyo Univ. of Sci. Japan
I-3-5 10:15 Defect-free GaAs/AlGaAs Heterostucture Etching Process by Chlorine/Argon Mixed Gas Neutral Beam X. Y. Wang, C. H. Huang, Y. Ohno, M. Igarashi,A. Murayama, S. Samukawa Tohoku Univ., Hokkaido Univ., CREST-JST Japan

Session I-4 Silicon Carbide Devices (Room 245, 15:10-16:10, September 23)
Paper # Start Time Title Authors Affiliations Country
I-4-1 (Invited) 15:10 SiC Power devices-Recent Progress and upcoming challenges P. Friedrichs SiCED Electronics Development GmbH & Co.KG Germany
I-4-2 15:40 Recombination Model at Perimeter of Stacking Faults in 4H-SiC pin Diode with Forward Voltage Drift K. Nakayama, Y. Sugawara,H. Tsuchida, C. Kimura, H. Aoki, The Kansai Electric Power Co., Inc.,Central Research Inst. Of Electric Power Industry,Osaka Univ. Japan
I-4-3 15:55 Influence of inserting AlN between AlSiON and 4H-SiC interface for MIS structure on SiC N. Komatsu, T. Satoh, M. Honjo, T. Futatuki, C. Kimura, H. Aoki Osaka Univ. Japan

Session I-5 Oxide Devices (Room 245, 16:50-17:50, September 23)
Paper # Start Time Title Authors Affiliations Country
I-5-1 16:50 Zinc Oxide Based Transparent and Stretchable Thin Film Transistor on Rubber Substrate K. Park, J. H. Ahn SungKyunkwan Univ., SKKU Aadvanced Institute of Nanotechnology Korea
I-5-2 17:05 ZnO thin film fabricated by plasma assisted atomic layer deposition Y. Kawamura, Y. Uraoka Nara Institute of Science and Technology, CREST-JST Japan
I-5-3 17:20 The Unique Phenomenon in the Amorphous In2O3-Ga2O3-ZnO TFTs Degradation under the Dynamic Stress M. Fujii, J. S. Jung, J. Y. Kwon, Y. Uraoka NAIST, Samsung Advanced Inst. of Tech., CREST-JST Japan
I-5-4 17:35 Novel Passivation Layer for Improvement of Reliability In Amorphous Indium Gallium Zinc Oxide Thin Film Transistors (TFTs) S. H. Choi, Y. W. Lee, J. Y. Kwon, M. K. Han Seoul National Univ. Korea

Session J-3 Graphene Photonics and Electronics (Room 246, 9:00-10:30, September 23)
Paper # Start Time Title Authors Affiliations Country
J-3-1 (Invited) 9:00 Graphene nanophotonics and nanoelectronics F. Xia IBM USA
J-3-2 9:30 Size and Chirality Dependence on Thermoelectric Properties of Graphene Nanoribbons W. Huang, H. Liang National Univ. of Singapore Singapore
J-3-3 9:45 Performance Potentials of Bilayer Graphene and Graphene Nanoribbon FETs H. Hosokawa, H. Ando, H. Tsuchiya Kobe Univ. Japan
J-3-4 10:00 Epitaxial Graphene-On-Silicon Logic Inverter A. E. Moutaouakil, H. C. Kang,H. Handa, H. Fukidome, T. Suemitsu, E. Sano, M. Suemitsu, T. Otsuji Tohoku Univ., Hokkaido Univ., CREST-JST Japan
J-3-5 10:15 Study of Hot Carriers in Optically Pumped Graphene A. Satou, T. Otsuji, Ryzhii Tohoku Univ., Univ. of Aizu, Japan Science and Technology Agency Japan

Session J-4 Graphene Electrical Properties (Room 246, 15:10-16:25, September 23)
Paper # Start Time Title Authors Affiliations Country
J-4-1 (Invited) 15:10 DOS Bottleneck for Contact Resistance in Graphene FETs K Nagashio Univ. of Tokyo Japan
J-4-2 15:40 Graphene layers dependent vibrational property of metal-graphene heterostructures S. Entani, S. Sakai, Y. Matsumoto, H. Naramoto, T. Hao, K. Takanashi, Y. Maeda JAEA, Tohoku Univ., Kyoto Univ. Japan
J-4-3 15:55 Observation of bandgap in epitaxial bilayer graphene field effect transistors S. Tanabe, Y. Sekine, H. Kageshima, M. Nagase,H. Hibino NTT Corp. Japan
J-4-4 16:10 Bridging Growth and Electrical Properties of Single Carbon Nanowall T. Kanda, H. Mikuni, K. Yamakawa, H. Kondo, M. Hiramatsu,M. Sekine, M. Hori Nagoya Univ.,Katagiri Engineering Co., Ltd.,Meijo Univ. Japan

Session J-5 Graphene Devices (Room 246, 16:50-17:50, September 23)
Paper # Start Time Title Authors Affiliations Country
J-5-1 16:50 Label-Free Immunosensors Based on Aptamer-Modified Graphene Field-Effect Transistors Y. Ohno, K. Maehashi, K. Matsumoto Osaka Univ. Japan
J-5-2 17:05 Performance Evaluation of Graphene Nanoribbon Heterojunction Tunneling Field Effect Transistors with various Source/Drain Doping Concentration and Heterojunction structure H. Da, K. T. Lam, S. K. Chin, G. S. Samudra, Y. C. Yeo, G. Liang National Univ. of Singapore, Institute of High Performance Computing Singapore
J-5-3 17:20 Impact of Surface Treatment of SiO2/Si Substrate on Mechanically Exfoliated Graphene T. Yamashita, J. Fujita, K. Nagashio, T. Nishimura, K. Kita, A. Toriumi Univ. of Tokyo Japan
J-5-4 17:35 Graphene based transversal-gated field effect transistor due to band gap modulation S. B. Kumar, T. Fujita, G. Liang National Univ. of Singapore Singapore

Session K-3 Compound Power Semiconductor Devices (Room 222, 9:00-10:30, September 23)
Paper # Start Time Title Authors Affiliations Country
K-3-1 (Invited) 9:00 Recent Progress in High Voltage MOS-gated Power Transistors in GaN T. P. Chow Rensselaer Polytechnic Institute USA
K-3-2 (Invited) 9:30 Progress in SiC Power Semiconductor Devices T. Shinohe Toshiba Corp. Japan
K-3-3 10:00 Effects of surface and crystalline defects on reverse characteristics of 4H-SiC JBS diodes T. Katsuno, Y. Watanabe, H. Fujiwara, M. Konishi, T. Yamamoto, T. Endo Toyota Central R&D Labs., Inc.,Toyota Motor Corp., DENSO Corp. Japan
K-3-4 10:15 High hole current achievement of hydrogen-terminated diamond MOSFETs coated with Poly-tetra-fluoro-ethylene S. Sato, K. Tsuge, T. Tsuno, T. Ono, H. Kawarada Waseda Univ. Japan

Session K-4 Next Generation Solar Cells and Systems (Room 222, 15:10-16:25, September 23)
Paper # Start Time Title Authors Affiliations Country
K-4-1 (Invited) 15:10 Next Generation PV-Inverters with SiC Semiconductors B. Burger Fraunhofer Institute of Solar Energy Garmany
K-4-2 15:40 Optical and Photoelectrical Characterizations of Wide-gap Nanocrystalline Silicon Layers R. Mentek, B. Gelloz, M. Kawabata, N. Koshida Tokyo Univ. of Agri. And Tech. Japan
K-4-3 15:55 Carrier Transfer Simulation on Si/SiC interface in Quantum Dot Solar Cells S. Hirose, I. Yamashita, R. Nagumo, R. Miura, A. Suzuki, H. Tsuboi, N. Hatakeyama, A. Endou, H. Takaba, M. Kubo, A. Miyamoto Tohoku Univ. Japan
K-4-4 16:10 Development of Multi-Scale Simulation Method for Dye-Sensitized Solar Cells Including Effect of Photoelectrode Material Interface M. Onodera, R. Nagumo, R. Miura, A. Suzuki, H. Tsuboi, N. Hatakeyama, A. Endou, H. Takaba, M. Kubo, A. Miyamoto Tohoku Univ. Japan

Session K-5 Compound Semiconductor Solar Cells (Room 222, 16:50-18:05, September 23)
Paper # Start Time Title Authors Affiliations Country
K-5-1(Invited) 16:50 Flexible Cu(In,Ga)Se2 Thin Film Solar Cells and Challenges for Low Temperature Growth C. A. Kaufmann Helmholtz Zentrum Berlin für Materialien und Energie Germany
K-5-2 17:20 First principles calculations of defect formation in In-free photovoltaic semiconductors Cu2ZnSnS4 and Cu2ZnSnSe4 T. Maeda, S. Nakamura, T. Wada Ryukoku Univ. Japan
K-5-3 17:35 Kinetics of strain relaxation in lattice-mismatched InxGa1-xAs/GaAs heteroepitaxy T. Sasaki, H. Suzuki, M. Takahasi, S. Fujikawa, I. Kamiya, Y. Ohshita, M. Yamaguchi Toyota Tech. Inst., Univ. of Miyazaki, JAEA Japan
K-5-4 17:50 Numerical Analysis of a Solar Cell with a Tensile-Strained Ge as a Novel Narrow Band Gap Absorber Y. Hoshina, M. Shimizu, A. Yamada, M. Konagai Tokyo Tech Japan

Session L-3 Nano Structures and Devices (Room 223, 9:00-10:30, September 23)
Paper # Start Time Title Authors Affiliations Country
L-3-1 (Invited) 9:00 Applications of Nanotechnology in Biomedical Micro/Nano Devices Gou-Jen Wang National Chung Hsing Univ. Taiwan
L-3-2 9:30 Development of Nanoscale Patterning Method of Self-Assembled Monolayer using Photothermal Desorption in Near-field Y. Yamamoto, Y. Taguchi, Y. Nagasaka Keio Univ. Japan
L-3-3 9:45 Positional control of crystal grains in silicon thin film utilizing cage shaped protein Y. Tojo, A. Miura, I. Yamashita, Y. Uraoka NAIST, National Chiao Tung Univ.,Panasonic Corp., CREST Japan
L-3-4 10:00 Control of Activation Energy for Electron Transport in Two-Dimensional Array of Si Nanodisks M. Igarashi, C. H. Huang, T. Morie, S. Samukawa Tohoku Univ., Kyushu Inst. of Tech. Japan
L-3-5 10:15 Optical Characteristics of Two-dimensional Array of Si Nano-disks Fabricated by Defect-free Neutral Beam Etching with Bio-template C. H. Huang, M. Igarashi, M. F. Budiman, R. Oshima, I. Yamashita, Y. Okada, S. Samukawa Tohoku Univ., Univ. of Tokyo, NAIST,CREST Japan