Technical Sessions on September 24 (Draft ver.)

Session A-6 Organic Transistors and Device Physics I (Room 211, 9:00-10:30, September 24)
Paper # Start Time Title Authors Affiliations Country
A-6-1 (Invited) 9:00 Ink-jet Printing of Organic Thin-Film Transistors T. Kawase Seiko Epson Corp. Japan
A-6-2 9:30 Organic CMOS Logic Papers with In-Field User Customizability T. Sekitani, K. Ishida, N. Masunaga, R. Takahashi, S. Shino, U. Zschieschang, H. Klauk, M. Takamiya, T. Sakurai, T. Someya Tokyo Univ. of Sci., Tokyo Univ., Mitsubishi Paper Mills Ltd., Max Planck Inst. for Solid State Research, Tokyo Univ., Tokyo Univ. Japan
A-6-3 9:45 Effects of an Interface Dipole Monolayer on Pentacene Organic Field-Effect Transistors W. Ou-Yang, K. Lee, M. Weis, T. Manaka, M. Iwamoto Tokyo Tech., Slovak Aca. Sci. Japan
A-6-4 10:00 Organic transistors and circuits with parylene gate dielectric manufactured using subfemtoliter inkjet T. Yokota, Y. Noguchi, Y. Kato, T. Sekitani, S. Takao Tokyo Univ. Japan
A-6-5 10:15 Effects of Gold Nanoparticles on Pentacene Organic Field-effect Transistors K. Lee, W. Ou-Yang, M. Weis, D. Taguchi, T. Manaka, M. Iwamoto Tokyo Tech, Slovak Aca. Sci Japan

Session A-7 Organic Transistors and Device Physics II (Room 211, 11:15-12:15, September 24)
Paper # Start Time Title Authors Affiliations Country
A-7-1 11:15 A Proposal of High Performance and Highly Fabricable Complementary Organic Thin Film Transistor Structure A. Sugawara, Y. Wada, Y. Ishikawa, T. Toyabe Tokyo Univ. Japan
A-7-2 11:30 Charge modulated reflectance measurement for probing carrier distribution in the pentacene field effect transistor T. Manaka, S.Kawashima, Y. Tanaka, M. Iwamoto Tokyo Tech. Japan
A-7-3 11:45 Bias-temperature-instability and thermal anneal effects of organic thin-film transistors P. H. Chen, P. Y. Lo, T. S. Hu, P. Li National Central Univ., Indus. Tech. Res. Institute Taiwan
A-7-4 12:00 Transport Mechanism at the First-layered Pentacene Grains and Grain Boundaries Y. Hu, L. Wang, Q. Qi, C. Jiang National Center for Nanoscience and Tech., Chinese Academy of Sci. China

Session A-8 Organic Transistors and Device Fabrication I (Room 211, 13:30-15:00, September 24)
Paper # Start Time Title Authors Affiliations Country
A-8-1 (Invited) 13:30 Materials and Processes for Air-Stable n-Channel Organic Transistors Z. Bao Stanford Univ. USA
A-8-2 14:00 3 V-driven flexible organic transistors with mobility exceeding 2 cm2/Vs K. Fukuda, N. Uchiyama, T. Sekitani, U. Zschieschang, H. Klauk, T. Yamamoto, K. Takimiya, T. Someya Tokyo Univ., Tokyo Univ., Max Planck Inst., Hiroshima Univ. Japan
A-8-3 14:15 Different interfacial carrier behaviors between k-NPD and pentacene double-layer device with a polyimide blocking-layer by time-resolved optical second harmonic generation L. Zhang, D. Taguchi, J. Li, T. Manaka, M. Iwamoto Tokyo Tech. Japan
A-8-4 14:30 Megahertz Operation of Rectifier Circuits using Pentacene Thin-Film Transistors M. Kitamura, Y. Arakawa Tokyo Univ. Japan
A-8-5 14:45 Realization of Pentacene-based Thin Film Transistor Arrays for Large-area Organic Electronics Being Compatible with the Roll-to-Roll Manufacturing Technique L. Wang, D. Li, C. Jiang National Center for Nanoscience and Tech., Chinese Academy of Sci. China

Session A-9 Organic Transistors and Device Fabrication II (Room 211, 15:30-17:00, September 24)
Paper # Start Time Title Authors Affiliations Country
A-9-1 15:30 Excellent interface properties of pentacene based metal-oxide-semiconductor diodes utilizing HfON higk-k gate insulator M. Liao, Y. U. Song, J. Ishikawa, T. Sano, J. Gao, H. Ishiwara, S. Ohmi Tokyo Tech. Japan
A-9-2 15:45 Oxygen Plasma Process of Self-assembled Monolayer Gate Dielectric for 2-V Operation High-mobility Organic TFT K. Kuribara, T. Nakagawa, K. Fukuda, T. Yokota, T. Sekitani, U. Zschieschang, H. Klauk, T. Someya, T. Yamamoto, K. Takimiya Tokyo Univ., Max Planck Inst for Solid State Res., Hiroshima Univ. Japan
A-9-3 16:00 Direct observation of carrier behavior leading to electroluminescence in tetracene field-effect transistor Y. Ohshima, H. Satou, T. Manaka, H. Kohn, N. Hirako, M. Iwamoto Tokyo Tech. Japan
A-9-4 16:15 Diffuser micropump structured with extremely flexible diaphragm of 2 micron-thick polyimide film Y. Liu, H. Komatsuzaki, Z. Duan, Y. Nishioka Nihon Univ. Japan
A-9-5 16:30 Printed Electrode for All-Printed Polymer Diode M. Yoshida, K. Suemori, S. Uemura, S. Hoshino, N. Takada, T. Kodzasa, T. Kamata AIST Japan
A-9-6 16:45 A Tunable Emission Prepared by Novel Photo-induced Color-Change Materials W. T. Liu, W. Y. Huang National Sun Yat-sen Univ. Taiwan

Session B-6 Junction Technology (Room 212, 9:00-10:30, September 24)
Paper # Start Time Title Authors Affiliations Country
B-6-1 (Invited) 9:00 Overview and Challenges in Source/Drain Formation Technology in High Performance Transistors. K. Suguro Toshiba Corp. Japan
B-6-2 9:30 Raised S/D for Advanced Planar MOSFET devices: Challenges and Applications for the 20nm Node and Beyond N. Loubet, P. Khare, S. Mehta, S. Ponoth, B. Haren, Q. Liu, K. Cheng, J. Kuss, T. Adam, B. Doris, V. Paruchuri, W. Kleemeier, R. Sampson STMicroelectronics, IBM USA
B-6-3 9:50 Raman Spectroscopy Measurement of Silicidation Induced Stress in Si and its Impact on Performances of Metal Source/Drain MOSFETs S. Migita, V. Poborchii, T. Tada, Y. Morita, W. Mizubayashi, H. Ota AIST Japan
B-6-4 10:10 Accurate Measurement of Silicide Specific Contact Resistivity by Cross Bridge Kelvin Resistor for 28 nm CMOS technology and Beyond K. Ohuchi, N. Kusunoki, F. Matsuoka Toshiba America Electronics Components, Inc. USA

Session B-7 Dopant Characterization (Room 212, 11:15-12:25, September 24)
Paper # Start Time Title Authors Affiliations Country
B-7-1 (Invited) 11:15 Dopant/carrier profiling in nanostructures. W. Vandervorst IMEC belgium
B-7-2 11:45 Hole generation in B-implanted Ge without annealing: Formation of B12 cluster acting as a double acceptor M. Koike, Y. Kamimuta MIRAI-Toshiba Japan
B-7-3 12:05 Contribution of Carbon to Growth of Boron-Containing Cluster in Heavily B-doped Silicon H. Itokawa, A. Ohta, M. Ikeda, I. Mizushima,
S. Miyazaki
Toshiba Corp., Hiroshima Univ. Japan

Session B-9 Interface and Strain Characterization (Room 212, 15:30-17:10, September 24)
Paper # Start Time Title Authors Affiliations Country
B-9-1 15:30 Measurements of Electrostatic Potential Across p-n Junctions on Oxidized Si Surfaces by Scanning Multi-Mode Tunneling Spectroscopy L. Bolotov, T. Tada, M. Iitake, M. Nishizawa, T. Kanayama AIST Japan
B-9-2 15:50 Interfacial atomic structure between Pt-added NiSi and Si (001) N. Ikarashi, M. Narihiro, T. Hase Renesas Electronics Corp. Japan
B-9-3 16:10 TO- and LO-mode analyses in asymmetric stretching vibrations in ultra thin thermally grown GeO2 on Ge substrate M. Yoshida, T. Nishimura, C. H. Lee, K. Kita, K. Nagashio, A. Toriumi Univ. of Tokyo, JST-CREST Japan
B-9-4 16:30 Quantitative Analysis of Stress Relaxation in TEM specimen fabrication by Raman Spectroscopy with High-NA Oil-Immersion Lens D. Kosemura, A. Ogura Meiji Univ. Japan
B-9-5 16:50 Uniaxial and Biaxial Strain Distribution Mapping in SOI Micro-Structures by Polarized Raman Spectroscopy M. Kurosawa, T. Sadoh, M. Miyao Kyushu Univ., JSPS Japan

Session C-6 Advanced CMOS Technology (Room 213, 9:00-10:30, September 24)
Paper # Start Time Title Authors Affiliations Country
C-6-1 (Invited) 9:00 Extremely-Thin SOI (ETSOI) for Mainstream CMOS:
Challenges and Opportunities
A. Khakifirooz IBM USA
C-6-2 9:30 Variability in Variable Body Factor Silicon on Thin Box MOSFETs (SOTB MOSFETs) Y. Yunxiang, D. Gang, H. Ruqi, L. Xiaoyan Peking Univ. China
C-6-3 9:50 Universal Relationship between Settling Time of Floating-Body SOI MOSFETs and the Substrate Current in their Body-Tied Counterparts A. Toda, K. Ohyama, N. Higashiguchi, D. Hori, M. Miyake, S. Amakawa, J. Ida, M. Miura-Mattausch Hiroshima Univ., Kanazawa Inst. Of Tech. Japan
C-6-4 10:10 Ion-Ioff performance analysis of FDSOI MOSFETs with low processing temperature C. Xu, P. Batude, C. Rauer, C. Le Royer, L. Hutin, A. Pouydebasque, C. Tabone, B. Previtali, O. Faynot, M. Mouis, V. Vinet CEA-LETI/MINATEC, IMEP France

Session C-7 FinFET Devices (Room 213, 11:15-12:35, September 24)
Paper # Start Time Title Authors Affiliations Country
C-7-1 11:15 Experimental Study of PVD-TiN Gate with Poly-Si Capping and Its Application to 20 nm FinFET Fabrication T. Kamei, Y. Liu, K. Endo, S. Ouchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, T. Hayashida, T. Matsukawa, K. Sakamoto, A. Ogura, M. Masahara Meiji University, AIST Japan
C-7-2 11:35 High-k Metal Gate FinFET SRAM Cell Optimization Considering Variability due to NBTI/PBTI and Surface Orientation V. P. H. Hu, K. L. Fan, C. Y. Hsieh, P. Su, C. T. Chuang National Chiao Tung Univ. Taiwan
C-7-3 11:55 Advantage of Plasma Doping for Source/Drain Extension for Bulk-FinFET T. Izumida, K. Okano, T. Kanemura, M. Kondo, S. Inaba, S. Itoh, N. Aoki, Y. Toyoshima Toshiba Corp. Japan
C-7-4 12:15 FinFETs Junctions Optimization by Conventional Ion Implantation for (Sub-)22nm Technology Nodes Circuit Applications A. Veloso, A. De Keersgieter, S. Brus, N. Horiguchi, P. P. Absil, T. Hoffmann IMEC Belgium

Session C-8 Gate-Insulation Reliability (Room 213, 13:30-15:10, September 24)
Paper # Start Time Title Authors Affiliations Country
C-8-1 13:30 Using Power Transform to Study DC and AC CHC Effects on nMOSFETs in 65 nm Technology S. Y. Chen, C. H. Tu, M. X. Wu, H. S. Huang, Z. W. Jhou, S. Chou, J. Ko National Taipei Univ. of Tech., United Microelectronics Corp. Taiwan
C-8-2 13:50 Effect of Hot-Carrier Stress on the Recoverable and Permanent Components of Negative-Bias Temperature Instability J. J. T. Ho, D. S. Ang, C. M. Ng Nanyang Tech. Univ., GLOBALFOUNDRIES Singapore Pte. Ltd. Singapore
C-8-3 14:10 Effect of Positive Gate Stressing on the Recoverable Component of Negative-Bias Temperature Instability A. A. Boo, D. S. Ang, Z. Q. Teo, C. M. Ng Nanyang Tech. Univ., GLOBALFOUNDRIES Singapore Pte. Ltd. Singapore
C-8-4 14:30 Investigation of Recovery Effects on Degraded pMOSFETs of 65 nm Technology with Different Annealing Temperatures S. Y. Chen, C. H. Tu, Y. F. Chen, H. S. Huang, Z. W. Jhou, S. Chou, J. Ko National Taipei Univ. of Tech., United Microelectronics Corp. Taiwan
C-8-5 14:50 Gate Leakage Current Reduction in Two-Step Processed High-k Dielectrics for Low Power Applications G. Bersuker, D. Heh, J. Huang, C.S. Park, A. Padovani, L. Larcher, P. Kirsch, R. Jammy SEMATECH, Univ. di Modena e Reggio Emilia USA

Session C-9 Emerging Device Technology (Room 213, 15:30-17:00, September 24)
Paper # Start Time Title Authors Affiliations Country
C-9-1 (Invited) 15:30 CVD Graphene for High Speed Electronics J. C. S. Woo UCLA USA
C-9-2 16:00 High Hole-Mobility 65nm Biaxially-Strained Ge-pFETs: Fabrication, Analysis and Optimization J. Mitard, B. De Jaeger, E. Eneman, A. Dobbie, M. Myronov, M. Kobayashi, J. Geypen, H. Bender, B. Vincent, R. Krom, J. Franco, G. Winderickx, E. Vrancken, W. E. Wang, J. Tseng, R. Loo, K. De Meyer, M. Caymax, L. Pantisano, D. R. Leadley, M. Meuris, P. Absil, S. Biesemans, T. Hoffmann IMEC,K.U Leuven, FWO, Univ. of Warwick, Stanford Univ., TSMC, IMEC Belgium
C-9-3 16:20 Ge FETs Gate Stack Passivation Options and their Scalability to low EOT F. Bellenger, B. De Jaeger, L. Nyns, M. Zahid, M. Houssa, E. Vrancken, J. Tseng, M. Caymax, M. Meuris, K. De Meyer, M. Heyns, T. Hoffmann IMEC, KULeuven, TSMC Belgium
C-9-4 16:40 Analysis of the Junctionless Transistor Architecture J. P. Colinge, J. P. Raskin, A. Kranti, I. Ferain, C. W. Lee, N. Dehdashti Akhavan, P. Razavi, R. Yan, R. Yu, Tyndall National Institute,Universite catholique de Louvain Ireland

Session D-6 Photonic and Electronic Integration (Room 221, 9:00-10:30, September 24)
Paper # Start Time Title Authors Affiliations Country
D-6-1 (Invited) 9:00 Membrane-type photonic devices for optical circuits on SOI S. Arai,
N. Nishiyama
Tokyo Tech Japan
D-6-2 9:30 Towards Optical Networks-on-Chip Using CMOS Compatible III-V/SOI Technology L. Grenouillet, P. Philippe, J. Harduin, N. Olivier, P. Grosse, L. Liu, T. Spuesens, P. Régreny, F. Mandorlo, P. Rojo-Romeo, R. Orobtchouk, D. Van Thourhout, J. M. Fedeli, CEA-LETI/MINATEC, Ghent Univ., Technical Univ of Denmark, Institut des Nanotechnologies de Lyon INL FRANCE
D-6-3 9:45 Design and Fabrication of Flip-Chip Micro-LED Arrays with PWM Driver for Heterogeneous Optoelectronic Integrated Circuit Device S. B. Shin, J. Chiba, H. Okada, S. Iwayama, A. Wakahara, Univ. of Toyohashi of Tech., Stanley Electric Co. Ltd. Japan
D-6-4 10:00 Monolithic One-bit Counter Circuit with Light Emitting Diode Indicators Fabricated in Si/III-V-N/Si Heterostructure S. Tanaka, K. Noguchi, K. Yamane, Y. Deguchi, Y. Furukawa, H. Okada, A. Wakahara, H. Yonezu Toyohashi Univ. of Tech. Japan
D-6-5 10:15 Monolithic Integration of Ga(NAsP) laser on Si (001) Substrate S. Liebich, M. Zimprich, P. Ludewig, A. Beyer, B. Kunert, N. Hossain, S. Jin, S. J. Sweeney, K. Volz, W. Stolz Philipps Univ. Marburg, NAsP III/V GmbH, Univ. of Surrey Germany

Session D-7 Nano Photonics (Room 221, 11:15-12:00, September 24)
Paper # Start Time Title Authors Affiliations Country
D-7-1 11:15 InGaAs Nano-Photodiode enhanced by Polarization-Insensitive Surface-Plasmon Antenna D. Okamoto, J. Fujikata, K. Ohashi, NEC Corp. Japan
D-7-2 11:30 Metallic Nano-Slit Array Lens for Spatial Resolution Improvement of In-vivo CMOS image sensor K. Sasagawa, T. Noda,T. Tokuda, M. Islam, J. Ohta, NAIST, JST-CREST, Univ. of California at Davis Japan
D-7-3 11:45 Enhanced Sensitivity of SOI Photodiode by Au Nanoparticles Y. Matsuo, A. Ono, H. Satoh, H. Inokawa Shizuoka Univ. Japan

Session D-8 Si Photonics (1) (Room 221, 13:30-15:15, September 24)
Paper # Start Time Title Authors Affiliations Country
D-8-1 (Invited) 13:30 Nanophotonic On-Chip Interconnection Networks for Energy-Performance Optimized Computing K. Bergman Columbia Univ. USA
D-8-2 14:00 Loss Measurement of Multiple Layer a-Si Waveguides toward 3D Si-Optical Circuits J. H. Kang, K. Inoue, Y. Atsumi, N. Nishiyama, S. Arai, Tokyo Tech Japan
D-8-3 14:15 Analysis of Vertically Stacked Structures of 2D PC Cavity and Amorphous-Silicon-Wire Waveguide with Low-Refractive-Index Material Cladding T. Yamada, M. Okano, Y. Sakakibara, T. Kamei, J. Sugisaka, N. Yamamoto, M. Itoh, T. Sugaya, K. Komori, M. Mori Univ. of Tsukuba, AIST Japan
D-8-4 14:30 Polarization-independent 5.4-ns Group Delay for Entire C-band by Integrated Delay Line of Si Rib Waveguide M. Tokushima, T. Chu, A. Kamei, T. Horikawa AIST Japan
D-8-5 14:45 Bandgap Control Using Strained Beam Structures for Si-Based Photonic Devices K. Yoshimoto, R. Suzuki, Y. Ishikawa, K. Wada Univ. of Tokyo Japan
D-8-6 15:00 Strained SiGe-on-Si beam for tunable near-infrared light emission R. Suzuki, K. Yoshimoto, L. Décosterd, Y. Ishikawa, K. Wada Univ. of Tokyo, Ecole Polytechnique Federale de Lausanne Japan

Session D-9 Si Photonics (2) (Room 221, 15:30-17:15, September 24)
Paper # Start Time Title Authors Affiliations Country
D-9-1 15:30 Real-time synchrotoron radiation X-ray diffraction and abnormal temperature dependence of photoluminescence from erbium silicates on SiO2/Si substrates H. Omi, T. Tawara, M. Tateishi, H. Komatsu, S. Takeda, Y. Tsusaka, Y. Kagoshima, J. Matsui NTT Basic Res. Labs., Univ. of Hyogo, CAST Japan
D-9-2 15:45 Evaluation of optical absorption and light propagation loss in ErxY2-xSiO5 crystal waveguides K. Homma, T. Nakajima, T. Kimura, H. Isshiki Univ. of Electro-Communications Japan
D-9-3 16:00 Design and Simulation of Silicon Ring Optical Modulator with p/n Junctions along Circumference Y. Amemiya, H. Ding, S. Yokoyama, Hiroshima Univ. Japan
D-9-4 16:15 Design of Broadband Optical Switch Based on Mach-Zehnder Interferometer with Si wire Waveguides K. Kintaka, Y. Shoji, S. Suda, H. Kawashima, T. Hasama, H. Ishikawa AIST Japan
D-9-5 16:30 Development of Accelerometer Using Mach-Zehnder Interferometer Type Optical Waveguide M. Suzuki, K. Nishioka, T. Takahashi, S. Aoyagi, Y. Amemiya, M. Fukuyama, S. Yokoyama, Kansai Univ., Hiroshima Univ. Japan
D-9-6 16:45 10-GHz Operation of a PLZT Electro-Optic Modulator with a Ring Resonator Formed on a Silicon Substrate T. Shimizu, M. Nakada, H. Tsuda, H. Miyazaki, J. Akedo, K. Ohashi MIRAI-Selete,NEC Corp.,AIST Japan
D-9-7 17:00 Crosstalk inprovement in Si-wire optical cross-bar switch H. Kawashima, Y. Shoji, K. Kintaka, S. Suda, T. Hasama, H. Ishikawa AIST Japan

Session E-6 FeRAM (Room 241, 9:00-10:20, September 24)
Paper # Start Time Title Authors Affiliations Country
E-6-1 (Invited) 9:00 Current Status and Future Challenge of Fe-NAND/SRAM Cell Technology K. Takeuchi Univ. of Tokyo Japan
E-6-2 (Invited) 9:30 Current Development Status and Future Challenges of FeRAM Y. Fujimori ROHM Co., Ltd. Japan
E-6-3 10:00 Synthesis of pure phase BiFeO3 films grown on Iridium electrode by MOCVD for ferroelectric memories Y. Kumura, S. Y. Yang, P. Yu, J. Zhang, J. Seideil, A. I. Khan, R. Ramesh Toshiba Corporation, University of California Berkeley Japan

Session E-7 MRAM (Room 241, 11:15-12:05, September 24)
Paper # Start Time Title Authors Affiliations Country
E-7-1(Invited) 11:15 Current Status and Future Challenge of Embedded High-speed MRAM S. Fukami NEC Corp. Japan
E-7-2 11:45 Phenomenological model for stress and relaxation processes of resistance drift in magnetic tunnel junctions Y. Kamakura, S. Nakano, K. Taniguchi, Osaka Univ. Japan

Session E-8 PRAM/ReRAM (Room 241, 13:30-15:00, September 24)
Paper # Start Time Title Authors Affiliations Country
E-8-1 (Invited) 13:30 A Survey of Cross Point Phase Change Memory Technologies D. Kau Intel Corp. USA
E-8-2 14:00 A SiO2 Nano-thermal Unipolar 0T-1R ReRAM Device with Built-in Diode Isolation K. P. Chang, H. T. Lue, K. Y. Hsieh, C. Y. Lu Macronix Int'l Co., Ltd. Taiwan
E-8-3 14:20 Resistive Switching Device for Neuromorphic Device Application K. Seo, I. Kim, S. Park, S. Jung, M. Jung, J. Park, J. Kong, K. Lee, B. Lee, H. Hwang GIST Korea
E-8-4 14:40 A Novel Ni/WOX/W ReRAM with Excellent Retention and Low Switching Curren W. C. Chien, Y. C. Chen, F. M. Lee, Y. Y. Lin, E. K. Lai, Y .D. Yao, J. Gong, S. F. Horng, C. W. Yeh, S. C. Tsai, C. H. Lee, Y. K. Huang, C. F. Chen, H. F. Kao, Y. H. Shih, K. Y. Hsieh, C. Y. Lu Macronix Int'l Corp. Ltd., Fu Jen Univ., National Tsing Hua Univ. Taiwan

Session E-9 ReRAM (Room 241, 15:30-17:00, September 24)
Paper # Start Time Title Authors Affiliations Country
E-9-1 (Invited) 15:30 Overview and Future Challenge of Hafnium Oxide ReRAM Y. S. Chen ITRI Taiwan
E-9-2 16:00 A New Tunneling Barrier Width Model of the Switching Mechanism in Hafnium Oxide-Based Resistive Random Access Memory Y. H. Tseng, S. S. Chung, S. Shin, S. S. M. Kang, H. Y. Lee, M. J. Tsai National Chiao Tung University, University of California, Merced,ITRI Taiwan
E-9-3 16:20 High OFF/ON-resistive NiO ReRAM using Post-Plasma-Oxidation (PPO) process K. Okamoto, M. Tada, K. Ito, Y. Saito, S. Ishida, H. Hada NEC Corp. Japan
E-9-4 16:40 Effects of Reactive Ti Creating Oxygen Vacancy Inside TiO2 on Resistive Switching Characteristics in Resistive Random Access Memory Device S. J. Kim, M. G. Sung, W. G. Kim, J. Y. Kim, J. H. Yoo, J. N. Kim, B. G. Gyun, J. Y. Byun, M. S. Joo, J. S. Roh, S. K. Park Hynix Semiconductor Inc. Korea

Session F-6 Spintronics (I) –Spin-related Phenomena and Applications– (Room 242, 9:30-10:45, September 24)
Paper # Start Time Title Authors Affiliations Country
F-6-1 9:30 Semiconductor / Ferromagnetic Metal Hybrid Optical Isolators using Nonreciprocal Polarization Rotation H. Shimizu, S. Goto, T. Mori Tokyo Univ. of Agri. and Tech. Japan
F-6-2 9:45 Fabrication of MgO-based Magnetic Tunnel Junctions for Magnetic Field Sensor K. Fujiwara, O. Mikihiko, K. Futoyoshi, N. Hiroshi, Y. Ando Tohoku Univ., RICOH COMPANY,LTD. Japan
F-6-3 10:00 First-Principles Calculations of Quantum Transport Properties of Fe/Fe2VAl/Fe Trilayers S. Yabuuchi, I. Kitagawa, T. Hamada Hitachi Ltd. Japan
F-6-4 10:15 Highly spin-polarized tunneling in Heusler-alloy-based magnetic tunnel junctions with a Co2MnSi upper electrode and a MgO barrier H. x. Liu, T. Taira, Y. Honda, K. Matsuda, T. Uemura, M. Yamamoto Hokkaido Univ. Japan
F-6-5 10:30 Temperature Dependence of Magnetic Damping in Heusler Alloy Thin Films M. Oogane, S. Mizukami, Y. Kota, T. Kubota, H. Naganuma, A. Sakuma, Y. Ando Tohoku Univ. Japan

Session F-7 Spintronics (II) –New Applications– (Room 242, 11:15-12:30, September 24)
Paper # Start Time Title Authors Affiliations Country
F-7-1 (Invited) 11:15 Three-Terminal Spin-Torque-Based Magnetic Memory Element M. C. Gaidis IBM USA
F-7-2 (Invited) 11:45 Spin dice-random number generator using current induced magnetization switching in MgO-MTJ A. Fukushima AIST Japan
F-7-3 12:15 High-speed MRAM Random Number Generator using Error-Correcting Code T. Tetsufumi, N. Shimomura, S. Ikegawa, M. Matsumoto, S. Fujita, H. Yoda Toshiba Corp. Japan

Session F-8 Spintronics (III) –Semiconductors– (Room 242, 13:30-15:00, September 24)
Paper # Start Time Title Authors Affiliations Country
F-8-1 (Invited) 13:30 Magnetic properties of GaMnAs and its application for multi-valued memory device S. Lee Korea Univ. Korea
F-8-2 (Invited) 14:00 Electrical Detection of Spin Transport in Si using high-quality Schottky Contacts K. Hamaya Kyushu Univ. Japan
F-8-3 14:30 Spin injection into GaAs from Fe/GaOx Tunnel Injector H. Saito, J. Le Breton, V. Zayets, Y. Mineno, S. Yuasa, K. Ando National Inst. of Adv. Indus. Sci. and Tech, Univ. of Twente, Toho Univ. Japan
F-8-4 14:45 Large magnetoresistance of Ge1-<i>x</i>Mn<i>x</i> single films and heterostructures with magnetic nanocolumns S. Yada, R. Okazaki, M. Tanaka Univ. of Tokyo Japan

Session F-9 Spintronics (IV) –Device and Circuits– (Room 242, 15:30-16:45, September 24)
Paper # Start Time Title Authors Affiliations Country
F-9-1 (Invited) 15:30 Spin transfer torque effects in nanopillar devices with perpendicular anisotropy S. Mangin IJL – Nancy Université France
F-9-2 16:00 High Speed Spin-Transfer Switching in GMR Nanopillars with Perpendicular Anisotropy H. Tomita, T. Nozaki, T. Seki, T. Nagase, E. Kitagawa, M. Yoshikawa, T. Daibou, M. Nagamine, S. Ikegawa, N. Shimomura, H. Yoda, Y. Suzuki Osaka Univ, Toshiba R & D center Japan
F-9-3 16:15 Hierarchical Nonvolatile Memory with Perpendicular Magnetic Tunnel Junctions for Normally-Off Computing K. Abe, K. Nomura, S. Ikegawa, T. Kishi, H. Yoda, S. Fujita Toshiba Corp. Japan
F-9-4 16:30 Design of a Process-Variation-Aware Nonvolatile MTJ-Based Lookup-Table Circuit D. Suzuki, M. Natsui, H. Ohno, T. Ohno Tohoku Univ. Japan

Session G-6 Image Sensors and Interface Circuits (Room 243, 9:00-10:30, September 24)
Paper # Start Time Title Authors Affiliations Country
G-6-1 (Invited) 9:00 CMOS High–Speed Image Sensors –Pixel Devices, Circuits and Architectures– S. Kawahito Shizuoka Univ. Japan
G-6-2 9:30 A Column Parallel Cyclic ADC with an Embedded Programmable Gain Amplifier for CMOS Image Sensors T. Iida, M. A. Mustafa, L. Zhuo, K. Yasutomi, S. Itoh, S. Kawahito Shizuoka Univ. Japan
G-6-3 9:50 A CMOS Image Sensor with an Automatic Pixel-Sensitivity Adjustment Function G. Ramos, Y. Hirata, Y. Arima, Kyushu Inst. of Tech., Fukuoka Indus., Sci. and Tech. Foundation Japan
G-6-4 10:10 A Subnanowatt Vibration-sensing Circuit for Dust-size Battery-less Sensor Nodes T. Shimamura, H. Morimura, M. Ugajin, S. Mutoh NTT Microsystem Integration Laboratories Japan

Session G-7 Data Converter Circuits (Room 243, 11:15-12:15, September 24)
Paper # Start Time Title Authors Affiliations Country
G-7-1 11:15 Qpix v.1: A high speed 400-pixels readout LSI with 10-bit 10MSps pixel ADCs F. Li, V. M. Khoa, M. Miyahara, A. Matsuzawa Tokyo Tech Japan
G-7-2 11:35 A 0.5V 1.4mW 750MHz 10b CMOS Current Steering DAC N. Shimasaki, R. Ito, M. Miyahara, A. Matsuzawa Tokyo Tech Japan
G-7-3 11:55 Low-Complexity Time-Domain Winner-Take-All Circuit with High Time-Difference Resolution Limited only by With-In-Die Variation M. Yasuda, T. Ansari,W. Imafuku, A. Kawabata,T. Koide, H. J. Mattausch Hiroshima Univ. Japan

Session G-8 Bio Nanofusion Technologies (Room 243, 13:30-15:00, September 24)
Paper # Start Time Title Authors Affiliations Country
G-8-1 (Invited) 13:30 Novel Quantum Effect Devices realized by Fusion of Bio-template and Defect-Free Neutral Beam Etching S. Samukawa Tohoku Univ. Japan
G-8-2 14:00 Planer Multi Electrode Array Coupled CMOS Image Sensor for in vitro Electrophysiology A. Nakajima, T. Noda, K. Sasagawa, T. Tokuda, Y. Ishikawa, S. Shiosaka, J. Ohta NAIST, JST-CREST Japan
G-8-3 14:15 Atmospheric Pressure Micro Inductively Coupled Plasma Light Source toward Portable Spectrometry System S. Kumagai, H. Matsuyama, M. Hori, M. Sasaki Toyota Technological Inst., Nagoya Univ. Japan
G-8-4 14:30 Controlled Thermal Emission of Narrow-band IR Waves for Downsizing Sensor Module K. Masuno, S. Kumagai, M. Sasaki Toyota Technological Inst. Japan
G-8-5 14:45 Fabrication and Location of 3-nm Pt Wires onto Silicon Surfaces M. Kobayashi, K. Onodera, Y. Watanabe, K. Shiba, I. Yamashita Japanese Foundation for Cancer Res., NAIST, Univ. of Tokyo, Panasonic Corp. Japan

Session G-9 Nanomaterial Applications (Room 243, 15:30-16:00, September 24)
Paper # Start Time Title Authors Affiliations Country
G-9-1 15:30 Free-Standing Lipid Bilayers Based on Nanoporous Alumina Films A. Hirano-Iwata, T. Taira,A. Oshima, Y. Kimura, M. Niwano Tohoku Univ., PRESTO, JST Japan
G-9-2 15:45 Fabrication of CMOS-compatible Poly-Si Nanowire FET Sensor H. Y. Chen, C. Y. Lin,M. C. Chen, H. C. Chen,C. C. Huang,C. H. Chien National Chiao Tung Univ., National Nano Device Labs. Taiwan

Session H-6 Cu Reliability (Room 244, 9:10-10:50, September 24)
Paper # Start Time Title Authors Affiliations Country
H-6-1 (Invited) 9:10 Cu Alloys and Noble Metal Liner Materials to Extend Damascene Copper Interconnect Schemes T. Nogami IBM USA
H-6-2 9:40 Migration of Copper through Tungsten-Filled Via on Single Damascene Copper Interconnect B. Kim, J. Kim, B. Seo, J. Oh, J. Cho, J. Lee, K. Hong, B. Choi, S. Park Hynix Semiconductor Inc. Korea
H-6-3 (Invited) 10:00 Electromigration Void Dynamics in Copper-Based Interconnects C.V. Thompson MIT USA
H-6-4 10:30 Structure Analyses of Ti-Based Self-Formed Barrier Layers K. Kohama, K. Ito,Y. Sonobayashi, K. Ohmori,K. Mori,K. Maekawa,Y. Shirai, M. Murakami Kyoto Univ.,Renesas Tech. Corp., Ritsumeikan Univ. Japan

Session H-7 3D Interconnect (Room 244, 11:15-12:15, September 24)
Paper # Start Time Title Authors Affiliations Country
H-7-1 (Invited) 11:15 3D Integration Technology and 3D System-on- a Chip M. Koyanagi Tohoku Univ. Japan
H-7-2 11:45 Evaluation of Copper Diffusion in Thinned Wafer with Extrinsic Gettering for 3D-LSI by Capacitance-Time(C-t) measurement" J. Bea, K. Lee, M. Murugesan, T. Fukushima, T. Tanaka, M. Koyanagi Tohoku Univ. Japan
H-7-3 12:05 Through Silicon Photonic Via with Si core for Low loss and High Density Vertical Optical Interconnection in 3D-LSI A. Noriki, K. Lee, J. Bea, T. Fukushima, T. Tanaka, M. Koyanagi Tohoku Univ. Japan

Session H-8 3D Integration (Room 244, 13:30-15:10, September 24)
Paper # Start Time Title Authors Affiliations Country
H-8-1 (Invited) 13:30 Low temperature bonding for 3D integration T. Suga Univ. of Tokyo Japan
H-8-2 14:00 Self-Assembly with Metal Microbump-to-Microbump Bonding for Advanced Chip-to-Wafer 3D Integration E. Iwata, Y. Ohara, K. W. Lee, T. Fukushima, T. Tanaka, M. Koyanagi Tohoku Univ. Japan
H-8-3 14:20 Metal Micro-Bump Induced Stress in 3D-LSIs _a micro-Raman Study M. Murugesan, Y. Ohara, J. C. Bea, K. W. Lee, T. Fukushima, T. Tanaka, M. Koyanagi Tohoku Univ. Japan

Session H-9 Image Sensor (Room 244, 15:30-16:10, September 24)
Paper # Start Time Title Authors Affiliations Country
H-9-1 15:30 Characterization of LTO coating on microlens of CMOS image sensor J. Gambino, B. Leidy,C. Musante, K. Ackerson,B. Guthrie,J. Twombly, E. Cooney,P. Pokrinchak,D. Meatyard, J. Adkisson, R. Rassel, M. Jaffe IBM USA
H-9-2 15:50 Near-Infrared Image Sensor Fabricated Using Compliant Bump N. Watanabe, F. Hoashi,Y. Nagai, H. Inada, Y. Iguchi,T. Asano Kyushu Univ., Sumitomo Electric Industries, Ltd. Japan

Session I-6 GaN Power Transistors (Room 245, 9:00-10:45, September 24)
Paper # Start Time Title Authors Affiliations Country
I-6-1 (Invited) 9:00 GaN Based Power Deviices:A New Era in Power Electronics M. A. Briere Executive Scientific Consultant ACOO Enterprises LLC Under contract with International Rectifier USA
I-6-2 9:30 Thermally Stable Isolation of AlGaN/GaN Transistors by Using Fe Ion Implantation H. Umeda, T. Takizawa,Y. Anda, T. Ueda, T. Tanaka, Panasonic Corp. Japan
I-6-3 9:45 AlGaN/GaN MOS-HEMT Single-Chip DC/DC Boost Converter Using High-k Gd2O3 Insulator C. W. Yang, S. W. Peng,C. K. Lin, H. C. Chiu Chang Gung Univ. Taiwan
I-6-4 10:00 Reduction of current collapse in AlGaN/GaN HEMTs using thick GaN cap layer H. Chonan, Y. Sakamura, G. Piao, T. Ide, M. Shimizu, Y. Yano, H. Nakanishi, Tokyo Univ. of Sci., AIST, Taiyo Nippon Sanso Corp. Japan
I-6-5 10:15 Reduced contact resistance and Improved surface morphology for Ohmic Contacts on AlGaN/GaN based Semiconductors employing KrF Laser Irradiation G. H. Wang, T. Sudhiranjan, X. Wang, H. Y. Zheng, T. K. Chan, T. Osipowicz, Y. L. Foo, Insititute of Materials Research and Engineering, Singapore Inst. Of Manufacturing Tech., National Univ. of Singapore Singapore
I-6-6 10:30 Nonequilibrium Carrier Transport Observed in Pnp AlGaN/GaN HBTs K. Kumakura, T. Makimoto NTT Corp. Japan

Session I-7 Processing and Interface Technologies (Room 245, 11:15-12:30, September 24)
Paper # Start Time Title Authors Affiliations Country
I-7-1 11:15 Deep level characterization of MOVPE-grown AlGaN with high Al compositions S. Okuzaki, K. Sugawara, H. Taketomi, H. Miyake, K. Hiramatsu, T. Hashizume Hokkaido Univ., Mie Univ. Japan
I-7-2 11:30 Direct Liquid Cooling Technology for Power Semiconductor Devices N. Otsuka, S. Nagai, M. Yanagihara, Y. Uemoto, D. Ueda, Panasonic Corp. Japan
I-7-3 11:45 Impact of Interface States and Bulk Carrier Lifetime on Photocapacitance of Metal/Insulator/GaN Structure P. Bidzinski, M. Miczek, B. Admowicz, C. Mizue, T. Hashizume, Silesian Univ. of Tech. Hokkaido Univ. Poland
I-7-4 12:00 Quantum Efficiency of H2 Generation by Water Decomposition Using p-GaN Photoelectrode T. Shimazaki, N. Kobayashi, M. Kako, J. Yamamoto, Y. Ban, K. Matsumoto Univ. of Electro-Communications, TNEMC Ltd. Japan
I-7-5 12:15 New Stacked MIM Capacitors with a Side-contact Formation Technology T. Tsutsumi, S. Sugitani,K. Nishimura, M. Ida NTT Corp. Japan

Session I-8 Crystalline and Thin Film Silicon Solar Cell (Room 245, 13:30-15:15, September 24)
Paper # Start Time Title Authors Affiliations Country
I-8-1 (Invited) 13:30 Crystalline Silicon Solar Cells, Thinner the Better Y. Hayashi Nanosystem Research Institute, National Institute of AIST Japan
I-8-2 14:00 Enhanced Power Conversion Efficiency for Silicon Solar Cells Utilizing a Uniformly Distributed Indium-Tin-Oxide Nano-Whiskers C. H. Chang, M. H. Hsu, W. L. Chang, W. C. Sun, P. Yu National Chiao Tung Univ., Industrial Technology Research Institute Taiwan
I-8-3 14:15 Microstructures of polycrystalline silicon films formed through explosive crystallization induced by flash lamp annealing K. Ohdaira, S. Ishii, T. Tomura, H. Matsumura JAIST, JST Japan
I-8-4 14:30 Stacked Solar Cells using Transparent and Conductive Adhesive J. Takenezawa, M. Hasumi, T. Sameshima, T. Koida, T. Kaneko, M. Karasawa, M. Kondo Tokyo Univ. of Agri. And Tech., AIST Japan
I-8-5 14:45 In-situ observation of polycrystalline Si thin films grown using Al-doped ZnO on glass substrate by the aluminum-induced crystallization M. Jung, A. Okada,T. Saito, T. Suemasu,N. Usami, Tohoku Univ.,Univ. of Tsukuba Japan
I-8-6 15:00 Photothermal Spectroscopy by Atomic Force Microscopy on Crystalline Silicon Solar Cell Materials K. Hara, T. Takahashi Univ. of Tokyo Japan

Session I-9 Crystalline and Thin Film Silicon Solar Cell (Room 245, 15:30-16:45, September 24)
Paper # Start Time Title Authors Affiliations Country
I-9-1 (Invited) 15:30 Impact of impurities on the solar cell performance G. Coletti ECN Solar Energy the Netherlands
I-9-2 16:00 Optimum design of a-Si:H/uc-Si:H tandem thin film solar cells with a low-refractive-index AZO transparent conducting oxide J. W. Leem, J. S. Yu Kyung Hee Univ. Korea
I-9-3 16:15 Efficiency enhancement of a-Si thin film solar cells by using different light trapping structures C. W. Kuo, W. P. Chu, J. S. Lin, T. C. Lin, Y. S. Tsai, F. S. Juang, M. H. Chung, T. E. Hsieh, M. O. Liu National Formosa Univ., Osaka Univ., Industrial Tech. Res. Inst.,KunSan Univ., National Chiao Tung Univ. Taiwan
I-9-4 16:30 Three-terminal a-Si solar Cells C. H. Tai, C. H. Lin, C. M. Wang, C. C. Lin National Dong Hua Univ. Taiwan

Session J-6 Nanowire Transistors (Room 246, 9:00-10:45, September 24)
Paper # Start Time Title Authors Affiliations Country
J-6-1 (Invited) 9:00 Circuit Implementation of InAs Nanowire FET W. Prost Solid-State Electronics Department, CeNIDE, University of Duisburg-Essen, Duisburg, Germany Germany
J-6-2 9:30 Transport Physics of Quasi-Ballistic Nanowire MOSFETs K. Natori Tokyo Inst. Tech. Japan
J-6-3 9:45 Body-biased steep-subthreshold-swing MOS (BS-MOS) with small hysteresis, off current, and drain voltage K. Nishiguchi, A. Fujiwara NTT Corp. Japan
J-6-4 10:00 Impacts of Diameter-Dependent Annealing in Silicon Nanowire MOSFETs R. Wang, T. Yu, W. Ding, R. Hung Peking Univ. China
J-6-5 10:15 Single-electron transport through a Germanium-Nanowire Quantum Dot S. K. Shin, S. Huang, N. Fukata, K. Ishibashi RIKEN, Tokyo Inst. of Tech., National Inst. for Materials Sci. Japan
J-6-6 10:30 A Theoretical Study of Electron Wave Function Penetration Effects on Electron-Modulated-Acoustic-Phonon Interactions in Silicon Nanowire MOSFETs J. Hattori, S. Uno,N. Mori, K. Nakazato Nagoya Univ., Osaka Univ., CREST-JST Japan

Session J-7 Nanowire Growth and Applications (Room 246, 11:15-12:15, September 24)
Paper # Start Time Title Authors Affiliations Country
J-7-1 11:15 Al-doped Zinc Oxide Field Emitter Array Controlled by High-Voltage Poly-Si Thin Film Transistor P. Y. Yang, J. L. Wang,W. C. Tsai, S. J. Wang, J. C. Lin, I. C. Lee, C. T. Chang, H. C. Cheng National Chiao Tung Univ., Ming Chi Univ. of Technology, National Cheng Kung Univ., St. John's Univ. Taiwan
J-7-2 11:30 Nanoarchitecture Light Emitting Diode Microarrays Using Position-Controlled GaN/ZnO Coaxial Nanotube Heterostructures C. H. Lee, J. Yoo, Y. J. Hong, J. Cho, Y. J. Kim, S. R. Jeon, J. H. Baek, G. C. Yi Seoul National Univ., POSTECH, Korea Photonics Tech. Inst. Korea
J-7-3 11:45 Electrical Characterization of InGaAs nanowire MISFETs Fabricated by Dielectric-first Process Y. Kohashi, T. Sato, K. Tomioka, S. Hara, T. Fukui, J. Motohisa Hokkaido Univ., JST-PRESTO. Japan
J-7-4 12:00 Lateral GaAs nanowires with triangular and trapezoidal cross-sections grown on (311)B and (001) substrates G. Zhang, K. Tateno,H. Gotoh, T. Sogawa NTT Corp. Japan
J-7-5 12:15 C-V Characteristics and Analysis of Undoped Gate-All-Around Nanowire FET Array R. H. Baek, C. K. Baek, S. H. Lee, S. D. Suk, M. Li, Y. Y. Yeoh, K. H. Yeo, D. W. Kim, J. S. Lee, D. M. Kim, Y. H. Jeong POSTECH, Korea Institute for Advanced Study (KIAS), NCNT Korea

Session K-6 Quantum Dots (Room 222, 9:00-10:45, September 24)
Paper # Start Time Title Authors Affiliations Country
K-6-1 (Invited) 9:00 Quantum Dot Superlattice for High Efficiency Intermediate Band Solar Cell Y. Okada Univ. of Tokyo Japan
K-6-2 9:30 Energy transfer in multi-stacked InAs quantum dots K. Akahane, N. Yamamoto, M. Naruse, T. Kawazoe, T. Yatsui, M. Ohtsu National Inst of Information and Communications Tech., Univ. of Tokyo Japan
K-6-3 9:45 Enhanced Photoluminescence Properties from Self-Assembled InAs Surface Quantum Dots by Antimony Incorporation C. H. Chiang, Y. H. Wu, M. C. Hsieh, C. H. Yang, J. F. Wang, Y. C. Chang, L. Chang, J. F. Chen National Chiao Tung Univ. Taiwan
K-6-4 10:00 Structure changes caused by quenching of InAs/GaAs(001) quantum dots M. Takahasi, JAEA Japan
K-6-5 10:15 High-temperature phosphorous passivation of Si surface for improved heteroepitaxial growth of InAs as an initial step of III-As MOVPE on Si M. Deura, Y. Kondo, M. Takenaka, S. Takagi,Y. Shimogaki, Y. Nakano, M. Sugiyama, Univ. of Tokyo Japan
K-6-6 10:30 Growth of InAs Quantum Dots with Various Charged States on a Wafer Utilizing Concentric Distribution N. Kumagai, S. Ohkouchi, M. Shirane, Y. Igarashi, M. Nomura, Y. Ota, S. Yorozu, S. Iwamoto, Y. Arakawa, Univ. of Tokyo, NEC Corp. Japan

Session K-7 Growth and Characterization of Nitrides (Room 222, 11:15-12:30, September 24)
Paper # Start Time Title Authors Affiliations Country
K-7-1 (Invited) 11:15 Droplet elimination process by radical beam irradiation for the growth of InN-based III-nitrides and its application to device structure T. Yamaguchi Ritsumeikan Univ. Japan
K-7-2 11:45 Reduction of S-parameter by the Introduction of Nitrogen in GaNAs: Positron Annihilation and Its Comparative Study with Photoluminescence Spectroscopy H. Nakamoto, F. Ishikawa, M. Kondow, Y. Oshima, A. Yabuchi, M. Mizuno, H. Araki, Y. Shirai Osaka Univ., Kyoto Univ. Japan
K-7-3 12:00 Nucleus and Spiral Growth of GaN Studied by Selective-Area Metalorganic Vapor Phase Epitaxy T. Akasaka, Y. Kobayashi,M. Kasu, NTT Corp. Japan
K-7-4 12:15 Enhanced optical characteristics of light-emitting-diode by localized surface plasmon of Ag/SiO2 nanoparticles L. W. Jang, T. Sahoo, D. S. Jo, J. W. Yoo, J. W. Jeon, S. M. Li, Y. H. Cho, I. H. Lee Chonbuk National Univ., KAIST Korea

Session K-8 Si and Ge-bansed Materials and Devices (Room 222, 13:30-15:00, September 24)
Paper # Start Time Title Authors Affiliations Country
K-8-1 13:30 Very high mobility 2D holes in strained Ge quantum well epilayers grown by Reduced Pressure Chemical Vapor Deposition M. Myronov, K. Sawano, D. R. Leadley, Y. Shiraki Univ. of Warwick, Tokyo City Univ. UK
K-8-2 13:45 Formation of Pyramidal-shaped Etch Pits on Germanium Surfaces Using Catalytic Reactions with Metallic Nanoparticles in Water T. Kawase, K. Nishitani, K. Dei, J. Uchikoshi, M. Morita, K. Arima Osaka Univ. Japan
K-8-3 14:00 Fabrication of defect-free and relaxed Ge-rich SGOI-wire structures for CMOS applications M. Oda, Y. Moriyama, K. Ideda, Y. Kamimuta, T. Tezuka, MIRAI-TOSHIBA Japan
K-8-4 14:15 Fabrication of Poly-Si TFT on Polycarbonate Substrate at Temperatures below 135oC G. Nakagawa, N. Kawamoto, T. Imamura, Y. Tomizawa, T. Miyoshi, K. Tadatomo, T. Asano, Kyushu Univ., Yamaguchi Univ., TEIJIN Ltd. Japan
K-8-5 14:30 Strain-Induced Back Channel Electron Mobility Enhancement in Poly-Si TFTs Formed by Continuous-Wave Laser Lateral Crystallization S. Fujii, S. I. Kuroki, K. Kotani, T. Ito Tohoku Univ. Japan
K-8-6 14:45 Epitaxial NiSi2 Buffer Technique for Fluoride Resonant Tunneling Devices on Si K. Takahashi, Y. Yoshizumi,Y. Fukuoka, N. Saito, K. Tsutsui, Tokyo Inst. of Tech. Japan